The Parallel Port: Introduction



Parallel Port Signals

Some signals are electrically inverted, i.e., a logical 'true' is indicated by low level on the physical line/pin.

It may be confusing that some line states are sometimes inverted on the PC's port registers. This is totally independent from the electrical inversion. This whole document will only talk about physical voltage levels, so the port inversion is only important when programming kernel drivers and the like.

The electrical inversion is indicated in the signal name by an initial slash, e.g. /Init.
The (maybe addititional) PC port inversion is shown in the following table.

The pin number given in the table refers to the sub-D 25 pin connector.

Name Pin# Direction Port Logic Description
/Init 16 H to P Positive Low level signals a reset condition regardless of the current state the device is in. My advice is that the peripheral sets all lines to Z-state, although this is not necessary.
/Select 17 H to P Inverting Low level signals that the parport is in Centronics mode. In 1284 modes, the signal is inactive (i.e., high).
D0,...,D7 2,...,9 both Positive The data lines are H to P in Centronics and nibble modes, and bi-directional in other 1284 modes. If unidirectional, they will be shown in host color: D0,...,D7.
/Strobe 1 H to P Inverting High-low edge signals that there is a byte of data on the data lines D0,...,D7.
/AutoFeed 14 H to P Inverting Shows whether the printer must introduce a automatic line feed (ASCII 10 / 0x0a) when a carriage return (ASCII 13 / 0x0d) is found in text mode.
Select 13 P to H Positive Used by the peripheral to indicate that it is on-line (=selected).
Busy 11 P to H Inverting Used by the peripheral to stop the host sending more data.
/Ack 10 P to H Positive Uses by the peripheral to acknowledge a data transmission.
12 P to H Positive By this the peripheral shows that there is no more paper in the printer.
/Error 15 P to H Positive By this the peripheral shows that there is some problem.


When a PC wants to indicate a reset condition, it has to set the /Init line to low level, because it is electrically inverted (as shown in the name). Because the PC has positive logic on that pin, it has to write a 0 into the corresponding bit in the register.


The host-to-peripheral signal /Select is sometimes called /Select_in to clearly distiguish it from the peripheral-to-host signal Select.

Line States

In contrast to normal convention, signal timing diagrams will be shown in top-down direction instead of left-to-right. This has the advantage that explanatory text can easily be provided for each step.

   = Driven high
   = Driven either high or low
   = Driven low
   = Insignificant (probably driven, but maybe not)
   = Not Driven, Z-State



January 14th, 2013
Comments? Suggestions? Corrections? You can drop me a line.